PCI Data Acquisition Boards

Ultraview's PCI data acquisition add-in cards are complete data acquisition (A/D) and control (D/A) systems on a single PCI Bus card. Ranging in speed from dual 14 and 12-bit 1-25MSPS boards up to 1500MSPS 8-bit boards with 8GB/16GB of on-board RAM. All cards come with graphical waveform viewers, example user programs (source code included) and device drivers for Linux or Solaris, allowing users to quickly prototype and develop their applications.

64-bit DMA transfers on all boards allow continuous, uninterrupted transfer of hundreds of megabytes, or even gigabytes of A/D or D/A data at sustained transfer rates of up to 400 megabytes per second. (when installed in 64-bit PCI slots). Models with 8GB of on-board RAM can acquire up to 8GB of uninterrupted data at aggregate speeds of up to 1.6GB/second.

In addition to the dual 14-bit or 12-Bit A/D and optional dual 14-Bit D/A converters, all ULTRADMA series boards except Models, ADDA14-100DMA, AD14-100DMA, AD8-100DMA, AD8S-100DMA, AD8S-100DMA-FPDP, AD8-650x2DMA, AD8-1250DMA and AD8CH12B-100DMA utilize three parallel TTL Inputs which can acquire digital data at the same rate, and concurrent with, the A/D samples. These unique high speed TTL input vectors enable the ULTRADMA to dynamically monitor control signals from external apparatus at the same time analog data is being acquired. Models ADDA14 and AD14-100DMA have one TTL input rather than five.

Event-controllable selective sampling allows a condition external to certain models of ULTRADMA board to start and stop storing data. Once A/D sampling has begun, it will continue while the Event signal is driven high (or left unconnected). Each time Event is driven low during acquisition, sampling will stop, and a time-stamp will be written into the next memory location, after which the storage of data will remain halted until Event is brought high again. The Event input and timestamp counter are not used on models AD8S-100DMA, AD8CH12B-100DMA, AD8-650x2DMA, AD8-1250DMA or DA14-100DMA.

Product SeriesMax Sample RateMin Sample RateResolutionD/A RateRAMChannels
1500 MS/s20 MS/s8 bits8 or 16 GB1 Channel
1250 MS/s100 MS/s8 bits8GB1 Channel
800 MS/s5 MS/s8 bits8GB2 Channels
100 MS/s50 KS/s8 bits4MB1 Channel
100 MS/s50 KS/s8 or 12 bits*4MB1, 2, 4 or 8
100 MS/s50 KS/s14 bits4MB2 Channels
14 bits15 MS/s4MB2 D/A Channels
25 MS/s50 KS/s14 bits15 MS/s4MB2 + 2 D/A
25 MS/s50 KS/s12 bits4MB2 Channels
25 MS/s50 KS/s12 bits15 MS/s4MB2 + 2 D/A

*The AD8CH12B-100DMA can be software programmed for 1,2,4 or 8 channels. The maximum sample rate depends on the number of channels programmed and is 100MS/s divided by the number of channels in 8-bit mode, and 100MS/s divided by 2 x the number of channels in 12-bit mode.

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